	.module nrf24l01.c
	.area text(rom, con, rel)
	.dbfile D:\01.Projects\JKElectronics\ATMEGA\CoreModule\sw\examples\lib\nrf24l01.c
	.area lit(rom, con, rel)
_TX_ADDRESS::
	.byte 52,'C
	.byte 16,16
	.byte 1
	.dbsym e TX_ADDRESS _TX_ADDRESS A[5:5]kc
_RX_ADDRESS::
	.byte 52,'C
	.byte 16,16
	.byte 1
	.dbsym e RX_ADDRESS _RX_ADDRESS A[5:5]kc
	.area text(rom, con, rel)
	.dbfile D:\01.Projects\JKElectronics\ATMEGA\CoreModule\sw\examples\lib\nrf24l01.c
	.dbfunc e bsp_nrf24l01_gpio_init _bsp_nrf24l01_gpio_init fV
	.even
_bsp_nrf24l01_gpio_init::
	.dbline -1
	.dbline 10
; 
; #include "hw_config.h"
; #include "spi.h"
; #include "nrf24l01.h"
; 
; const u8 TX_ADDRESS[TX_ADR_WIDTH] = {0x34, 0x43, 0x10, 0x10, 0x01}; // send address
; const u8 RX_ADDRESS[RX_ADR_WIDTH] = {0x34, 0x43, 0x10, 0x10, 0x01}; // send address
; 
; void bsp_nrf24l01_gpio_init (void)
; {
	.dbline 11
; 	sbi(NRF24L01_CS_DIR, NRF24L01_CS_PIN_NO);
	lds R24,97
	ori R24,4
	sts 97,R24
	.dbline 12
; 	sbi(NRF24L01_CE_DIR, NRF24L01_CE_PIN_NO);
	sbi 0x14,6
	.dbline 13
; 	cbi(NRF24L01_IRQ_DIR, NRF24L01_IRQ_PIN_NO);
	cbi 0x2,5
	.dbline 15
; 
; 	bsp_spi_gpio_init();
	xcall _bsp_spi_gpio_init
	.dbline -2
L4:
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e bsp_nrf24l01_init _bsp_nrf24l01_init fV
	.even
_bsp_nrf24l01_init::
	.dbline -1
	.dbline 21
; }
; 
; 
; // Initialize the IO port 24L01
; void bsp_nrf24l01_init (void)
; {
	.dbline 22
; 	bsp_spi_init();
	xcall _bsp_spi_init
	.dbline 24
; 
; 	bsp_set_spi_speed(SPI_SPEED_LOW);
	ldi R16,1
	xcall _bsp_set_spi_speed
	.dbline 27
; 
; 	// start transmission
; 	bsp_readwritebyte_spi(0xff);	
	ldi R16,255
	xcall _bsp_readwritebyte_spi
	.dbline 29
; 
; 	LOW_24L01_CE;
	cbi 0x15,6
	.dbline 30
; 	HIGH_24L01_CSN;
	lds R24,98
	ori R24,4
	sts 98,R24
	.dbline -2
L5:
	.dbline 0 ; func end
	ret
	.dbend
	.area lit(rom, con, rel)
L7:
	.byte 165,165
	.byte 165,165
	.byte 165
	.area text(rom, con, rel)
	.dbfile D:\01.Projects\JKElectronics\ATMEGA\CoreModule\sw\examples\lib\nrf24l01.c
	.dbfunc e nRF24L01_Check _nRF24L01_Check fc
;            buf -> y+1
;              i -> R20
	.even
_nRF24L01_Check::
	st -y,R20
	st -y,R21
	sbiw R28,6
	.dbline -1
	.dbline 37
; 	
; }
; 
; // Check whether there 24L01
; // Return value: 0 success; 1, failure
; u8 nRF24L01_Check (void)
; {
	.dbline 39
; 
; 	u8 buf[5] = {0XA5, 0XA5, 0XA5, 0XA5, 0XA5};
	ldi R24,<L7
	ldi R25,>L7
	movw R30,R28
	adiw R30,1
	ldi R16,5
	ldi R17,0
	st -y,R31
	st -y,R30
	st -y,R25
	st -y,R24
	xcall asgncblk
	.dbline 42
; 	u8 i;
; 	
; 	bsp_set_spi_speed (SPI_SPEED_HIGH); // spi speed 9Mhz (24L01 maximum SPI clock is 10Mhz)
	clr R16
	xcall _bsp_set_spi_speed
	.dbline 44
; 	
; 	nRF24L01_Write_Buf (NRF24L01_WRITE_REG + TX_ADDR, buf, 5); // write 5 bytes of the address.
	ldi R24,5
	std y+0,R24
	movw R18,R28
	subi R18,255  ; offset = 1
	sbci R19,255
	ldi R16,48
	xcall _nRF24L01_Write_Buf
	.dbline 45
; 	nRF24L01_Read_Buf (TX_ADDR, buf, 5); // read the address written
	ldi R24,5
	std y+0,R24
	movw R18,R28
	subi R18,255  ; offset = 1
	sbci R19,255
	ldi R16,16
	xcall _nRF24L01_Read_Buf
	.dbline 47
; 	
; 	for (i = 0; i<5; i++) 
	clr R20
	xjmp L11
L8:
	.dbline 48
; 		if (buf[i] != 0XA5) 
	movw R24,R28
	adiw R24,1
	mov R30,R20
	clr R31
	add R30,R24
	adc R31,R25
	ldd R24,z+0
	cpi R24,165
	breq L12
X0:
	.dbline 49
; 			break;
	xjmp L10
L12:
L9:
	.dbline 47
	inc R20
L11:
	.dbline 47
	cpi R20,5
	brlo L8
X1:
L10:
	.dbline 51
; 		
; 	if (i != 5) 
	cpi R20,5
	breq L14
X2:
	.dbline 52
; 		return 1; // error detection 24L01
	ldi R16,1
	xjmp L6
L14:
	.dbline 54
; 		
; 	return 0; // detect 24L01
	clr R16
	.dbline -2
L6:
	.dbline 0 ; func end
	adiw R28,6
	ld R21,y+
	ld R20,y+
	ret
	.dbsym l buf 1 A[5:5]c
	.dbsym r i 20 c
	.dbend
	.dbfunc e nRF24L01_Write_Reg _nRF24L01_Write_Reg fc
;         status -> R10
;          value -> R12
;            reg -> R10
	.even
_nRF24L01_Write_Reg::
	xcall push_xgset003C
	mov R12,R18
	mov R10,R16
	.dbline -1
	.dbline 63
; 
; 
; }
; 
; // SPI write register
; // Reg: register address specified
; // Value: The value to write
; u8 nRF24L01_Write_Reg (u8 reg, u8 value)
; {
	.dbline 66
; 	u8 status;
; 	
; 	LOW_24L01_CSN; // Enable SPI transfer
	lds R24,98
	andi R24,251
	sts 98,R24
	.dbline 68
; 	
; 	status = bsp_readwritebyte_spi (reg); // send the register number
	mov R16,R10
	xcall _bsp_readwritebyte_spi
	mov R10,R16
	.dbline 69
; 	bsp_readwritebyte_spi (value); // write registers
	mov R16,R12
	xcall _bsp_readwritebyte_spi
	.dbline 71
; 	
; 	HIGH_24L01_CSN; // SPI transfer ban
	lds R24,98
	ori R24,4
	sts 98,R24
	.dbline 73
; 	
; 	return (status); // return status values
	mov R16,R10
	.dbline -2
L16:
	.dbline 0 ; func end
	xjmp pop_xgset003C
	.dbsym r status 10 c
	.dbsym r value 12 c
	.dbsym r reg 10 c
	.dbend
	.dbfunc e nRF24L01_Read_Reg _nRF24L01_Read_Reg fc
;        reg_val -> R10
;            reg -> R10
	.even
_nRF24L01_Read_Reg::
	st -y,R10
	st -y,R11
	mov R10,R16
	.dbline -1
	.dbline 79
; }
; 
; // Read SPI register values
; // Reg: register to read
; u8 nRF24L01_Read_Reg (u8 reg)
; {
	.dbline 82
; 	u8 reg_val;
; 
; 	LOW_24L01_CSN; // Enable SPI transfer
	lds R24,98
	andi R24,251
	sts 98,R24
	.dbline 84
; 
; 	bsp_readwritebyte_spi (reg); // send the register number
	mov R16,R10
	xcall _bsp_readwritebyte_spi
	.dbline 85
; 	reg_val = bsp_readwritebyte_spi (0XFF); // read register
	ldi R16,255
	xcall _bsp_readwritebyte_spi
	mov R10,R16
	.dbline 87
; 
; 	HIGH_24L01_CSN; // SPI transfer ban
	lds R24,98
	ori R24,4
	sts 98,R24
	.dbline 89
; 
; 	return (reg_val); // return status values
	.dbline -2
L17:
	.dbline 0 ; func end
	ld R11,y+
	ld R10,y+
	ret
	.dbsym r reg_val 10 c
	.dbsym r reg 10 c
	.dbend
	.dbfunc e nRF24L01_Read_Buf _nRF24L01_Read_Buf fc
;         status -> R10
;         u8_ctr -> R12
;            len -> y+6
;           pBuf -> R14,R15
;            reg -> R10
	.even
_nRF24L01_Read_Buf::
	xcall push_xgset00FC
	movw R14,R18
	mov R10,R16
	.dbline -1
	.dbline 99
; }
; 
; // Read in the specified location data in a specified length
; // Reg: register (location)
; // * PBuf: data pointer
; // Len: data length
; // Return value, the value of the read status register
; 
; u8 nRF24L01_Read_Buf (u8 reg, u8 * pBuf, u8 len)
; {
	.dbline 102
; 	u8 status, u8_ctr;
; 
; 	LOW_24L01_CSN; // Enable SPI transfer
	lds R24,98
	andi R24,251
	sts 98,R24
	.dbline 104
; 
; 	status = bsp_readwritebyte_spi (reg); // send the register values (location), and read the status value
	mov R16,R10
	xcall _bsp_readwritebyte_spi
	mov R10,R16
	.dbline 105
; 	for (u8_ctr=0; u8_ctr<len; u8_ctr++) 
	clr R12
	xjmp L22
L19:
	.dbline 106
; 		pBuf[u8_ctr] = bsp_readwritebyte_spi(0XFF); // read data
	ldi R16,255
	xcall _bsp_readwritebyte_spi
	mov R30,R12
	clr R31
	add R30,R14
	adc R31,R15
	std z+0,R16
L20:
	.dbline 105
	inc R12
L22:
	.dbline 105
	ldd R0,y+6
	cp R12,R0
	brlo L19
X3:
	.dbline 108
; 
; 	HIGH_24L01_CSN; // turn off SPI transfer
	lds R24,98
	ori R24,4
	sts 98,R24
	.dbline 110
; 
; 	return status; // return status value read
	mov R16,R10
	.dbline -2
L18:
	.dbline 0 ; func end
	xjmp pop_xgset00FC
	.dbsym r status 10 c
	.dbsym r u8_ctr 12 c
	.dbsym l len 6 c
	.dbsym r pBuf 14 pc
	.dbsym r reg 10 c
	.dbend
	.dbfunc e nRF24L01_Write_Buf _nRF24L01_Write_Buf fc
;         status -> R10
;         u8_ctr -> R12
;            len -> y+6
;           pBuf -> R14,R15
;            reg -> R10
	.even
_nRF24L01_Write_Buf::
	xcall push_xgset00FC
	movw R14,R18
	mov R10,R16
	.dbline -1
	.dbline 119
; }
; 
; // Write the specified length at the specified location data
; // Reg: register (location)
; // * PBuf: data pointer
; // Len: data length
; // Return value, the value of the read status register
; u8 nRF24L01_Write_Buf (u8 reg, u8 * pBuf, u8 len)
; {
	.dbline 122
; 	u8 status, u8_ctr;
; 	
; 	LOW_24L01_CSN; // Enable SPI transfer
	lds R24,98
	andi R24,251
	sts 98,R24
	.dbline 124
; 	
; 	status = bsp_readwritebyte_spi (reg); // send the register values (location), and read the status value
	mov R16,R10
	xcall _bsp_readwritebyte_spi
	mov R10,R16
	.dbline 126
; 	
; 	for (u8_ctr=0;u8_ctr<len;u8_ctr++) 
	clr R12
	xjmp L27
L24:
	.dbline 127
; 		bsp_readwritebyte_spi(*pBuf++); // write data
	movw R30,R14
	ld R16,Z+
	movw R14,R30
	xcall _bsp_readwritebyte_spi
L25:
	.dbline 126
	inc R12
L27:
	.dbline 126
	ldd R0,y+6
	cp R12,R0
	brlo L24
X4:
	.dbline 129
; 		
; 	HIGH_24L01_CSN; // turn off SPI transfer
	lds R24,98
	ori R24,4
	sts 98,R24
	.dbline 131
; 	
; 	return status; // return status value read
	mov R16,R10
	.dbline -2
L23:
	.dbline 0 ; func end
	xjmp pop_xgset00FC
	.dbsym r status 10 c
	.dbsym r u8_ctr 12 c
	.dbsym l len 6 c
	.dbsym r pBuf 14 pc
	.dbsym r reg 10 c
	.dbend
	.dbfunc e nRF24L01_TxPacket _nRF24L01_TxPacket fc
;            sta -> R10
;          txbuf -> R10,R11
	.even
_nRF24L01_TxPacket::
	st -y,R10
	st -y,R11
	movw R10,R16
	sbiw R28,1
	.dbline -1
	.dbline 138
; }
; 
; // Start to send a data NRF24L01
; // Txbuf: the first address data to be transmitted
; // Return value: Send completed state
; u8 nRF24L01_TxPacket (u8 * txbuf)
; {
	.dbline 141
; 	u8 sta;
; 	
; 	bsp_set_spi_speed(SPI_SPEED_HIGH); // spi speed 9Mhz (24L01 maximum SPI clock is 10Mhz)
	clr R16
	xcall _bsp_set_spi_speed
	.dbline 143
; 	
; 	LOW_24L01_CE;
	cbi 0x15,6
	.dbline 144
; 	nRF24L01_Write_Buf (WR_TX_PLOAD, txbuf, TX_PLOAD_WIDTH); // write data to the TX BUF 32 bytes
	ldi R24,32
	std y+0,R24
	movw R18,R10
	ldi R16,160
	xcall _nRF24L01_Write_Buf
	.dbline 145
; 	HIGH_24L01_CE; // start transmission
	sbi 0x15,6
L29:
	.dbline 147
; 	
; 	while (inp(NRF24L01_IRQ_PIN, NRF24L01_IRQ_PIN_NO) != 0); // wait for transmission complete
L30:
	.dbline 147
	sbic 0x1,5
	rjmp L29
X5:
	.dbline 148
; 	sta = nRF24L01_Read_Reg (STATUS); // read status register
	ldi R16,7
	xcall _nRF24L01_Read_Reg
	mov R10,R16
	.dbline 149
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + STATUS, sta); // Clear interrupt flag TX_DS or MAX_RT
	mov R18,R10
	ldi R16,39
	xcall _nRF24L01_Write_Reg
	.dbline 150
; 	if (sta & MAX_TX) // maximum number of retransmissions
	sbrs R10,4
	rjmp L32
X6:
	.dbline 151
; 	{
	.dbline 152
; 		nRF24L01_Write_Reg (FLUSH_TX, 0xff); // Clear TX FIFO registers
	ldi R18,255
	ldi R16,225
	xcall _nRF24L01_Write_Reg
	.dbline 153
; 		return MAX_TX;
	ldi R16,16
	xjmp L28
L32:
	.dbline 155
; 	}
; 	if (sta & TX_OK) // send the completed
	sbrs R10,5
	rjmp L34
X7:
	.dbline 156
; 	{
	.dbline 157
; 		return TX_OK;
	ldi R16,32
	xjmp L28
L34:
	.dbline 160
; 	}
; 	
; 	return 0xff; // send failed for other reasons
	ldi R16,255
	.dbline -2
L28:
	.dbline 0 ; func end
	adiw R28,1
	ld R11,y+
	ld R10,y+
	ret
	.dbsym r sta 10 c
	.dbsym r txbuf 10 pc
	.dbend
	.dbfunc e nRF24L01_RxPacket _nRF24L01_RxPacket fc
;            sta -> R12
;          rxbuf -> R10,R11
	.even
_nRF24L01_RxPacket::
	xcall push_xgset003C
	movw R10,R16
	sbiw R28,1
	.dbline -1
	.dbline 168
; 	
; }
; 
; // Start to send a data NRF24L01
; // Txbuf: the first address data to be transmitted
; // Return value: 0, receive completed; other, error codes
; u8 nRF24L01_RxPacket (u8 * rxbuf)
; {
	.dbline 171
; 	u8 sta;
; 
; 	bsp_set_spi_speed(SPI_SPEED_HIGH); // spi speed 9Mhz (24L01 maximum SPI clock is 10Mhz)
	clr R16
	xcall _bsp_set_spi_speed
	.dbline 173
; 	
; 	sta = nRF24L01_Read_Reg (STATUS); // read status register
	ldi R16,7
	xcall _nRF24L01_Read_Reg
	mov R12,R16
	.dbline 174
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + STATUS, sta); // Clear interrupt flag TX_DS or MAX_RT
	mov R18,R12
	ldi R16,39
	xcall _nRF24L01_Write_Reg
	.dbline 176
; 	
; 	if (sta & RX_OK) // receive data
	sbrs R12,6
	rjmp L37
X8:
	.dbline 177
; 	{
	.dbline 178
; 		nRF24L01_Read_Buf (RD_RX_PLOAD, rxbuf, RX_PLOAD_WIDTH); // read data
	ldi R24,32
	std y+0,R24
	movw R18,R10
	ldi R16,97
	xcall _nRF24L01_Read_Buf
	.dbline 179
; 		nRF24L01_Write_Reg (FLUSH_RX, 0xff); // clear the RX FIFO registers
	ldi R18,255
	ldi R16,226
	xcall _nRF24L01_Write_Reg
	.dbline 180
; 		return 0;
	clr R16
	xjmp L36
L37:
	.dbline 183
; 	}
; 	
; 	return 1; // did not receive any data
	ldi R16,1
	.dbline -2
L36:
	.dbline 0 ; func end
	adiw R28,1
	xjmp pop_xgset003C
	.dbsym r sta 12 c
	.dbsym r rxbuf 10 pc
	.dbend
	.dbfunc e nRF24L01_RX_Mode _nRF24L01_RX_Mode fV
	.even
_nRF24L01_RX_Mode::
	sbiw R28,1
	.dbline -1
	.dbline 190
; }
; 
; // This function initializes NRF24L01 to RX mode
; // Set RX address, write RX data width, select the RF channel, baud rate and LNA HCURR
; // When CE high, the RX mode is entered, and can receive the data
; void nRF24L01_RX_Mode (void)
; {
	.dbline 191
; 	LOW_24L01_CE;
	cbi 0x15,6
	.dbline 193
; 	
; 	nRF24L01_Write_Buf (NRF24L01_WRITE_REG + RX_ADDR_P0, (u8 *) RX_ADDRESS, RX_ADR_WIDTH); // write node address RX
	ldi R24,5
	std y+0,R24
	ldi R18,<_RX_ADDRESS
	ldi R19,>_RX_ADDRESS
	ldi R16,42
	xcall _nRF24L01_Write_Buf
	.dbline 195
; 
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + EN_AA, 0x01); // enable the automatic response channel 0
	ldi R18,1
	ldi R16,33
	xcall _nRF24L01_Write_Reg
	.dbline 196
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + EN_RXADDR, 0x01); // Enable receiver address channel 0
	ldi R18,1
	ldi R16,34
	xcall _nRF24L01_Write_Reg
	.dbline 197
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + RF_CH, 40); // set the RF communication frequency
	ldi R18,40
	ldi R16,37
	xcall _nRF24L01_Write_Reg
	.dbline 198
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + RX_PW_P0, RX_PLOAD_WIDTH); // select a valid data width of the channel 0
	ldi R18,32
	ldi R16,49
	xcall _nRF24L01_Write_Reg
	.dbline 199
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + RF_SETUP, 0x0f); // set the TX emission parameters, 0db gain, 2Mbps, Low Noise Gain Open
	ldi R18,15
	ldi R16,38
	xcall _nRF24L01_Write_Reg
	.dbline 200
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + CONFIG, 0x0f); // configure the basic parameters of the model work; PWR_UP, EN_CRC, 16BIT_CRC, receive mode
	ldi R18,15
	ldi R16,32
	xcall _nRF24L01_Write_Reg
	.dbline 202
; 	
; 	HIGH_24L01_CE; // CE is high, into the receive mode
	sbi 0x15,6
	.dbline -2
L39:
	.dbline 0 ; func end
	adiw R28,1
	ret
	.dbend
	.dbfunc e nRF24L01_TX_Mode _nRF24L01_TX_Mode fV
	.even
_nRF24L01_TX_Mode::
	sbiw R28,1
	.dbline -1
	.dbline 211
; }
; 
; // This function initializes NRF24L01 to TX mode
; // Set TX address and write data width of the TX, RX set the address auto-answer, fill TX transmit data, select the RF channel, baud rate and LNA HCURR
; // PWR_UP, CRC Enable
; // When CE high, the RX mode is entered, and can receive the data
; // CE is taller than 10us, then start sending.
; void nRF24L01_TX_Mode (void)
; {
	.dbline 212
; 	LOW_24L01_CE;
	cbi 0x15,6
	.dbline 214
; 	
; 	nRF24L01_Write_Buf (NRF24L01_WRITE_REG + TX_ADDR, (u8 *) TX_ADDRESS, TX_ADR_WIDTH); // Write TX node address
	ldi R24,5
	std y+0,R24
	ldi R18,<_TX_ADDRESS
	ldi R19,>_TX_ADDRESS
	ldi R16,48
	xcall _nRF24L01_Write_Buf
	.dbline 215
; 	nRF24L01_Write_Buf (NRF24L01_WRITE_REG + RX_ADDR_P0, (u8 *) RX_ADDRESS, RX_ADR_WIDTH); // set the TX node address, mainly in order to enable ACK
	ldi R24,5
	std y+0,R24
	ldi R18,<_RX_ADDRESS
	ldi R19,>_RX_ADDRESS
	ldi R16,42
	xcall _nRF24L01_Write_Buf
	.dbline 217
; 
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + EN_AA, 0x01); // enable the automatic response channel 0
	ldi R18,1
	ldi R16,33
	xcall _nRF24L01_Write_Reg
	.dbline 218
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + EN_RXADDR, 0x01); // Enable receiver address channel 0
	ldi R18,1
	ldi R16,34
	xcall _nRF24L01_Write_Reg
	.dbline 219
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + SETUP_RETR, 0x1a); // set up automatic retransmission interval: 500us + 86us; largest auto retransmissions: 10
	ldi R18,26
	ldi R16,36
	xcall _nRF24L01_Write_Reg
	.dbline 220
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + RF_CH, 40); // set the RF channel 40
	ldi R18,40
	ldi R16,37
	xcall _nRF24L01_Write_Reg
	.dbline 221
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + RF_SETUP, 0x0f); // set the TX emission parameters, 0db gain, 2Mbps, Low Noise Gain Open
	ldi R18,15
	ldi R16,38
	xcall _nRF24L01_Write_Reg
	.dbline 222
; 	nRF24L01_Write_Reg (NRF24L01_WRITE_REG + CONFIG, 0x0e); // configure the basic parameters of the model work; PWR_UP, EN_CRC, 16BIT_CRC, receive mode, turn on all interrupts
	ldi R18,14
	ldi R16,32
	xcall _nRF24L01_Write_Reg
	.dbline 224
; 	
; 	HIGH_24L01_CE; // CE is high, 10us start sending
	sbi 0x15,6
	.dbline -2
L40:
	.dbline 0 ; func end
	adiw R28,1
	ret
	.dbend
; }
; 
; 
